{"product_id":"yx-os18-minib210-ad9361-sdr-70mhz-6ghz-usb-3-0-board-for-gsm-base-station-prototyping-and-gnu-radio-development","title":"YX-OS18 miniB210 AD9361 SDR 70MHz–6GHz USB 3.0 Board for GSM Base Station Prototyping and GNU Radio Development","description":"\u003ch1\u003eTinyB210 Software Defined Radio (SDR) Platform\u003c\/h1\u003e\n\u003ch2\u003eProduct Overview\u003c\/h2\u003e\n\u003cp\u003e\u003cstrong\u003eTinyB210\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eis a fully integrated, single-board, general-purpose software defined radio peripheral platform with continuous frequency coverage from\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003e70MHz to 6GHz\u003c\/strong\u003e. It is designed for low-cost experimentation and education, integrating the\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eAnalog Devices AD9361\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003edirect-conversion RF transceiver, a reconfigurable FPGA, and a high-speed\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eUSB 3.0\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003einterface with bus-powered operation.\u003c\/p\u003e\n\u003cp\u003eTinyB210 is fully supported by mainstream SDR software ecosystems, allowing developers to immediately start working with\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eGNU Radio\u003c\/strong\u003e, build GSM base station prototypes using\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eOpenBTS\u003c\/strong\u003e, and seamlessly migrate code from B210-class devices to higher-performance, industry-ready SDR platforms.\u003c\/p\u003e\n\u003ch2\u003eRF \u0026amp; Digital Architecture\u003c\/h2\u003e\n\u003cp\u003eThe integrated RF front-end is based on the\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eAD9361\u003c\/strong\u003e, a single-chip, direct-conversion transceiver capable of up to\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003e56MHz real-time RF bandwidth\u003c\/strong\u003e. TinyB210 utilizes both signal chains of the AD9361 to provide\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003ecoherent 2x2 MIMO (2Tx \/ 2Rx)\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003eoperation.\u003c\/p\u003e\n\u003cp\u003eOnboard signal processing and control are handled by the FPGA, which connects to the host PC via USB 3.0. The system supports a real-time throughput benchmark of\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003e61.44 MS\/s complex I\/Q\u003c\/strong\u003e, enabling full utilization of the 56MHz instantaneous RF bandwidth in GNU Radio or UHD API-based applications.\u003c\/p\u003e\n\u003ch2\u003eKey Performance Parameters\u003c\/h2\u003e\n\u003ctable\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003cth\u003eCategory\u003c\/th\u003e\n\u003cth\u003eValue\u003c\/th\u003e\n\u003cth\u003eUnit\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDC Input Voltage\u003c\/td\u003e\n\u003ctd\u003e5\u003c\/td\u003e\n\u003ctd\u003eV\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eADC Sampling Rate (Max)\u003c\/td\u003e\n\u003ctd\u003e61.44\u003c\/td\u003e\n\u003ctd\u003eMS\/s\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eADC Resolution\u003c\/td\u003e\n\u003ctd\u003e12\u003c\/td\u003e\n\u003ctd\u003ebits\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eADC SFDR\u003c\/td\u003e\n\u003ctd\u003e78\u003c\/td\u003e\n\u003ctd\u003edBc\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDAC Sampling Rate\u003c\/td\u003e\n\u003ctd\u003e61.44\u003c\/td\u003e\n\u003ctd\u003eMS\/s\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eDAC Resolution\u003c\/td\u003e\n\u003ctd\u003e12\u003c\/td\u003e\n\u003ctd\u003ebits\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eHost Interface Throughput (16-bit)\u003c\/td\u003e\n\u003ctd\u003e61.44\u003c\/td\u003e\n\u003ctd\u003eMS\/s\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eReference Clock Accuracy\u003c\/td\u003e\n\u003ctd\u003e±2\u003c\/td\u003e\n\u003ctd\u003eppm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eTCXO Accuracy (Unlocked)\u003c\/td\u003e\n\u003ctd\u003e±7.5\u003c\/td\u003e\n\u003ctd\u003eppm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eTCXO Accuracy (Locked)\u003c\/td\u003e\n\u003ctd\u003e\u0026lt;1\u003c\/td\u003e\n\u003ctd\u003eppm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eSingle-Sideband \/ Image Suppression\u003c\/td\u003e\n\u003ctd\u003e-35 \/ -50\u003c\/td\u003e\n\u003ctd\u003edBc\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOutput Power @ 2.4GHz\u003c\/td\u003e\n\u003ctd\u003e3.5\u003c\/td\u003e\n\u003ctd\u003edBm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eOutput Power @ 6GHz\u003c\/td\u003e\n\u003ctd\u003e-12\u003c\/td\u003e\n\u003ctd\u003edBm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eMaximum Output Power\u003c\/td\u003e\n\u003ctd\u003e\u0026gt;10\u003c\/td\u003e\n\u003ctd\u003edBm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eInput IP3\u003c\/td\u003e\n\u003ctd\u003e-20\u003c\/td\u003e\n\u003ctd\u003edBm\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eNoise Figure\u003c\/td\u003e\n\u003ctd\u003e\u0026lt;8\u003c\/td\u003e\n\u003ctd\u003edB\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003ch2\u003eKey Features\u003c\/h2\u003e\n\u003ctable\u003e\n\u003ctbody\u003e\n\u003ctr\u003e\n\u003cth\u003eFeature\u003c\/th\u003e\n\u003cth\u003eDescription\u003c\/th\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFrequency Coverage\u003c\/td\u003e\n\u003ctd\u003e70MHz – 6GHz continuous\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eMIMO Capability\u003c\/td\u003e\n\u003ctd\u003eFull-duplex 2Tx \/ 2Rx coherent MIMO\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eInstantaneous Bandwidth\u003c\/td\u003e\n\u003ctd\u003eUp to 56MHz (61.44MS\/s complex)\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eHost Interface\u003c\/td\u003e\n\u003ctd\u003eHigh-speed USB 3.0, bus-powered\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eFPGA\u003c\/td\u003e\n\u003ctd\u003eOpen and reconfigurable FPGA architecture\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eRFIC\u003c\/td\u003e\n\u003ctd\u003eAnalog Devices AD9361 direct-conversion transceiver\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003ctr\u003e\n\u003ctd\u003eEnclosure\u003c\/td\u003e\n\u003ctd\u003eOptional steel enclosure for black PCB devices\u003c\/td\u003e\n\u003c\/tr\u003e\n\u003c\/tbody\u003e\n\u003c\/table\u003e\n\u003ch2\u003eSRSRAN \u0026amp; Base Station Support\u003c\/h2\u003e\n\u003cdiv class=\"block\"\u003e\n\u003cp\u003eTinyB210 is capable of running\u003cspan\u003e \u003c\/span\u003e\u003cstrong\u003eSRSRAN\u003c\/strong\u003e\u003cspan\u003e \u003c\/span\u003esmall-cell base stations. Detailed workflows and experimental procedures are documented on our blog:\u003c\/p\u003e\n\u003cp\u003e\u003ca rel=\"nofollow noopener\" href=\"https:\/\/yantechlab.com\/blogs\/%E6%96%B0%E9%97%BB\/deploying-an-srsran-lte-small-cell-using-minib210\" target=\"_blank\"\u003eDeploying an srsRAN LTE Small Cell Using miniB210\u003c\/a\u003e\u003c\/p\u003e\n\u003c\/div\u003e","brand":"YanTechLab","offers":[{"title":"Default Title","offer_id":47801805373605,"sku":null,"price":249.9,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0733\/7367\/9781\/files\/ScreenShot_2026-01-13_160427_447.png?v=1768307872","url":"https:\/\/yantechlab.com\/de\/products\/yx-os18-minib210-ad9361-sdr-70mhz-6ghz-usb-3-0-board-for-gsm-base-station-prototyping-and-gnu-radio-development","provider":"YanTechLab","version":"1.0","type":"link"}